Fault Detection in RNS Systolic Arrays

A b s t r a c t This letter discusses simple techniques for the implementation of fault detection in Residue Number System (RNS) arithmetic modules used in systolic arrays. The technique centres around a recently introduced linear systolic structure[1], and does not require a redundant residue system[2] for the detection process. It is shown that this structure can be used as the detection process in a fault correcting RNS system. A simple bit-serial/residue-serial structure has been recently introduced[1] which allows most RNS operations to be accomplished with only one generic cell structure in a linear systolic array. The simplicity of the cell also allows easy fault detection; the subject of this letter. There has been considerable interest in fault detection/correction using the RNS for many years[2,3]. The fault detection process is often posed in terms of redundant RNS systems